4-layer semiconductor packaging substrate

Product Description

This is a chip-scale package (CSP) substrate for IC substrates that is compatible with the wire bonding process. Its core lies in the connection between the chip and the substrate bonding fingers via wire bonding using gold wires/aluminum wires or other conductive wires. The package area is close to the chip size (typically, the chip area is ≥ 80% of the package area), and it is equipped with BGA solder balls on the back for interconnection with PCBs.